// Copyright (c) Huawei Technologies Co., Ltd. 2021-2022. All rights reserved.
// File name     :  fabric_c_union_define.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1.0
// Date          :  2020/9/28
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V5.1
// History       :  2022/09/21 14:21:49 Create file
// ******************************************************************************

#ifndef __FABRIC_C_UNION_DEFINE_H__
#define __FABRIC_C_UNION_DEFINE_H__

/* Define the union csr_sc_pllfctrl0_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    pll0_refdiv        : 6  ; /* [5:0] */
        u32    pll0_fbdiv         : 12  ; /* [17:6] */
        u32    pll0_postdiv1      : 3  ; /* [20:18] */
        u32    pll0_postdiv2      : 3  ; /* [23:21] */
        u32    pll0_bypass        : 1  ; /* [24] */
        u32    pll0_en            : 1  ; /* [25] */
        u32    pll0_dsmen         : 1  ; /* [26] */
        u32    pll0_dacen         : 1  ; /* [27] */
        u32    pll0_fout4phaseen  : 1  ; /* [28] */
        u32    pll0_foutpostdiven : 1  ; /* [29] */
        u32    pll0_foutvcoen     : 1  ; /* [30] */
        u32    rsv_1              : 1  ; /* [31] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_pllfctrl0_u;

/* Define the union csr_sc_pllfctrl1_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    pll0_frac : 26  ; /* [25:0] */
        u32    rsv_3     : 6  ; /* [31:26] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_pllfctrl1_u;

/* Define the union csr_sc_pll_clk_bypass0_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    pll0_bypass_external_n : 1  ; /* [0] */
        u32    rsv_5                  : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_pll_clk_bypass0_u;

/* Define the union csr_sc_switch_clk_sel_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    switch_div_sel_kernel_ultrasoc : 1  ; /* [0] */
        u32    switch_div_sel_gic             : 1  ; /* [1] */
        u32    switch_div_sel_poe             : 1  ; /* [2] */
        u32    rsv_7                          : 29  ; /* [31:3] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_switch_clk_sel_u;

/* Define the union csr_sc_pll_lp_clk_sel_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    lp_clk_sel : 3  ; /* [2:0] */
        u32    rsv_9      : 29  ; /* [31:3] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_pll_lp_clk_sel_u;

/* Define the union csr_sc_l3d_clk_en_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_en_l3d0 : 1  ; /* [0] */
        u32    icg_en_l3d1 : 1  ; /* [1] */
        u32    icg_en_l3d2 : 1  ; /* [2] */
        u32    icg_en_l3d3 : 1  ; /* [3] */
        u32    rsv_11      : 28  ; /* [31:4] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_l3d_clk_en_u;

/* Define the union csr_sc_l3d_clk_dis_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_dis_l3d0 : 1  ; /* [0] */
        u32    icg_dis_l3d1 : 1  ; /* [1] */
        u32    icg_dis_l3d2 : 1  ; /* [2] */
        u32    icg_dis_l3d3 : 1  ; /* [3] */
        u32    rsv_13       : 28  ; /* [31:4] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_l3d_clk_dis_u;

/* Define the union csr_sc_hha_clk_en_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_en_hha0 : 1  ; /* [0] */
        u32    icg_en_hha1 : 1  ; /* [1] */
        u32    rsv_15      : 30  ; /* [31:2] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_hha_clk_en_u;

/* Define the union csr_sc_hha_clk_dis_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_dis_hha0 : 1  ; /* [0] */
        u32    icg_dis_hha1 : 1  ; /* [1] */
        u32    rsv_17       : 30  ; /* [31:2] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_hha_clk_dis_u;

/* Define the union csr_sc_mn_clk_en_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_en_mn : 1  ; /* [0] */
        u32    rsv_19    : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_mn_clk_en_u;

/* Define the union csr_sc_mn_clk_dis_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_dis_mn : 1  ; /* [0] */
        u32    rsv_21     : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_mn_clk_dis_u;

/* Define the union csr_sc_l3_mbist_clk_en_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_en_mbist_l3d0 : 1  ; /* [0] */
        u32    icg_en_mbist_l3d1 : 1  ; /* [1] */
        u32    icg_en_mbist_l3d2 : 1  ; /* [2] */
        u32    icg_en_mbist_l3d3 : 1  ; /* [3] */
        u32    icg_en_mbist_l3t0 : 1  ; /* [4] */
        u32    icg_en_mbist_l3t1 : 1  ; /* [5] */
        u32    icg_en_mbist_l3t2 : 1  ; /* [6] */
        u32    icg_en_mbist_l3t3 : 1  ; /* [7] */
        u32    icg_en_mbist_l3t4 : 1  ; /* [8] */
        u32    icg_en_mbist_l3t5 : 1  ; /* [9] */
        u32    icg_en_mbist_l3t6 : 1  ; /* [10] */
        u32    icg_en_mbist_l3t7 : 1  ; /* [11] */
        u32    rsv_23            : 20  ; /* [31:12] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_l3_mbist_clk_en_u;

/* Define the union csr_sc_l3_mbist_clk_dis_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_dis_mbist_l3d0 : 1  ; /* [0] */
        u32    icg_dis_mbist_l3d1 : 1  ; /* [1] */
        u32    icg_dis_mbist_l3d2 : 1  ; /* [2] */
        u32    icg_dis_mbist_l3d3 : 1  ; /* [3] */
        u32    icg_dis_mbist_l3t0 : 1  ; /* [4] */
        u32    icg_dis_mbist_l3t1 : 1  ; /* [5] */
        u32    icg_dis_mbist_l3t2 : 1  ; /* [6] */
        u32    icg_dis_mbist_l3t3 : 1  ; /* [7] */
        u32    icg_dis_mbist_l3t4 : 1  ; /* [8] */
        u32    icg_dis_mbist_l3t5 : 1  ; /* [9] */
        u32    icg_dis_mbist_l3t6 : 1  ; /* [10] */
        u32    icg_dis_mbist_l3t7 : 1  ; /* [11] */
        u32    rsv_25             : 20  ; /* [31:12] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_l3_mbist_clk_dis_u;

/* Define the union csr_sc_l3d_reset_req_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_req_l3d0 : 1  ; /* [0] */
        u32    srst_req_l3d1 : 1  ; /* [1] */
        u32    srst_req_l3d2 : 1  ; /* [2] */
        u32    srst_req_l3d3 : 1  ; /* [3] */
        u32    rsv_27        : 28  ; /* [31:4] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_l3d_reset_req_u;

/* Define the union csr_sc_l3d_reset_dreq_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_dreq_l3d0 : 1  ; /* [0] */
        u32    srst_dreq_l3d1 : 1  ; /* [1] */
        u32    srst_dreq_l3d2 : 1  ; /* [2] */
        u32    srst_dreq_l3d3 : 1  ; /* [3] */
        u32    rsv_29         : 28  ; /* [31:4] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_l3d_reset_dreq_u;

/* Define the union csr_sc_hha_reset_req_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_req_hha0 : 1  ; /* [0] */
        u32    srst_req_hha1 : 1  ; /* [1] */
        u32    rsv_31        : 30  ; /* [31:2] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_hha_reset_req_u;

/* Define the union csr_sc_hha_reset_dreq_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_dreq_hha0 : 1  ; /* [0] */
        u32    srst_dreq_hha1 : 1  ; /* [1] */
        u32    rsv_33         : 30  ; /* [31:2] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_hha_reset_dreq_u;

/* Define the union csr_sc_mn_reset_req_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_req_mn : 1  ; /* [0] */
        u32    rsv_35      : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_mn_reset_req_u;

/* Define the union csr_sc_mn_reset_dreq_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_dreq_mn : 1  ; /* [0] */
        u32    rsv_37       : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_mn_reset_dreq_u;

/* Define the union csr_sc_cpm_reset_req_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_req_cpm : 1  ; /* [0] */
        u32    rsv_39       : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_cpm_reset_req_u;

/* Define the union csr_sc_cpm_reset_dreq_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_dreq_cpm : 1  ; /* [0] */
        u32    rsv_41        : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_cpm_reset_dreq_u;

/* Define the union csr_sc_ffs_reset_req_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_req_ffs : 1  ; /* [0] */
        u32    rsv_43       : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_ffs_reset_req_u;

/* Define the union csr_sc_ffs_reset_dreq_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_dreq_ffs : 1  ; /* [0] */
        u32    rsv_45        : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_ffs_reset_dreq_u;

/* Define the union csr_sc_hha_mbist_reset_req_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_req_mbist_l3d0 : 1  ; /* [0] */
        u32    srst_req_mbist_l3d1 : 1  ; /* [1] */
        u32    srst_req_mbist_l3d2 : 1  ; /* [2] */
        u32    srst_req_mbist_l3d3 : 1  ; /* [3] */
        u32    srst_req_mbist_l3t0 : 1  ; /* [4] */
        u32    srst_req_mbist_l3t1 : 1  ; /* [5] */
        u32    srst_req_mbist_l3t2 : 1  ; /* [6] */
        u32    srst_req_mbist_l3t3 : 1  ; /* [7] */
        u32    srst_req_mbist_l3t4 : 1  ; /* [8] */
        u32    srst_req_mbist_l3t5 : 1  ; /* [9] */
        u32    srst_req_mbist_l3t6 : 1  ; /* [10] */
        u32    srst_req_mbist_l3t7 : 1  ; /* [11] */
        u32    rsv_47              : 20  ; /* [31:12] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_hha_mbist_reset_req_u;

/* Define the union csr_sc_hha_mbist_reset_dreq_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_dreq_mbist_l3d0 : 1  ; /* [0] */
        u32    srst_dreq_mbist_l3d1 : 1  ; /* [1] */
        u32    srst_dreq_mbist_l3d2 : 1  ; /* [2] */
        u32    srst_dreq_mbist_l3d3 : 1  ; /* [3] */
        u32    srst_dreq_mbist_l3t0 : 1  ; /* [4] */
        u32    srst_dreq_mbist_l3t1 : 1  ; /* [5] */
        u32    srst_dreq_mbist_l3t2 : 1  ; /* [6] */
        u32    srst_dreq_mbist_l3t3 : 1  ; /* [7] */
        u32    srst_dreq_mbist_l3t4 : 1  ; /* [8] */
        u32    srst_dreq_mbist_l3t5 : 1  ; /* [9] */
        u32    srst_dreq_mbist_l3t6 : 1  ; /* [10] */
        u32    srst_dreq_mbist_l3t7 : 1  ; /* [11] */
        u32    rsv_49               : 20  ; /* [31:12] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_hha_mbist_reset_dreq_u;

/* Define the union csr_sc_ts_en_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    sc_ts_en : 1  ; /* [0] */
        u32    rsv_51   : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_ts_en_u;

/* Define the union csr_sc_tsensor0_alarm_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    tsensor0_low  : 10  ; /* [9:0] */
        u32    rsv_54        : 6  ; /* [15:10] */
        u32    tsensor0_high : 10  ; /* [25:16] */
        u32    rsv_55        : 6  ; /* [31:26] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_tsensor0_alarm_u;

/* Define the union csr_sc_tsensor0_sample_num_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    tsensor0_sample_shift_num : 4  ; /* [3:0] */
        u32    rsv_57                    : 28  ; /* [31:4] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_tsensor0_sample_num_u;

/* Define the union csr_sc_tsensor0_ctrl_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    tsensor0_temp_en     : 1  ; /* [0] */
        u32    tsensor0_temp_calib  : 1  ; /* [1] */
        u32    rsv_60               : 10  ; /* [11:2] */
        u32    tsensor0_temp_ct_sel : 2  ; /* [13:12] */
        u32    rsv_61               : 18  ; /* [31:14] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_tsensor0_ctrl_u;

/* Define the union csr_sc_tsensor0_vcalib_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    tsensor0_temp_ready_sel : 1  ; /* [0] */
        u32    tsensor0_temp_cfg       : 8  ; /* [8:1] */
        u32    rsv_63                  : 23  ; /* [31:9] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_tsensor0_vcalib_u;

/* Define the union csr_sc_poe_smmu_enent_en_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    sc_poe_smmu_event_en : 1  ; /* [0] */
        u32    rsv_65               : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_poe_smmu_enent_en_u;

/* Define the union csr_sc_port_ctrl_ring_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    close_port_gic       : 1  ; /* [0] */
        u32    close_port_l3dright3 : 1  ; /* [1] */
        u32    close_port_l3dright2 : 1  ; /* [2] */
        u32    close_port_l3dright1 : 1  ; /* [3] */
        u32    close_port_l3dright0 : 1  ; /* [4] */
        u32    close_port_l3dleft3  : 1  ; /* [5] */
        u32    close_port_l3dleft2  : 1  ; /* [6] */
        u32    close_port_l3dleft1  : 1  ; /* [7] */
        u32    close_port_l3dleft0  : 1  ; /* [8] */
        u32    close_port_l3t7      : 1  ; /* [9] */
        u32    close_port_l3t6      : 1  ; /* [10] */
        u32    close_port_l3t5      : 1  ; /* [11] */
        u32    close_port_l3t4      : 1  ; /* [12] */
        u32    close_port_l3t3      : 1  ; /* [13] */
        u32    close_port_l3t2      : 1  ; /* [14] */
        u32    close_port_l3t1      : 1  ; /* [15] */
        u32    close_port_l3t0      : 1  ; /* [16] */
        u32    close_port_hha3      : 1  ; /* [17] */
        u32    close_port_hha2      : 1  ; /* [18] */
        u32    close_port_hha1      : 1  ; /* [19] */
        u32    close_port_hha0      : 1  ; /* [20] */
        u32    close_port_mn        : 1  ; /* [21] */
        u32    close_port_peri      : 1  ; /* [22] */
        u32    close_port_poe       : 1  ; /* [23] */
        u32    close_port_sllc3     : 1  ; /* [24] */
        u32    close_port_sllc2     : 1  ; /* [25] */
        u32    close_port_sllc1     : 1  ; /* [26] */
        u32    close_port_sllc0     : 1  ; /* [27] */
        u32    rsv_67               : 4  ; /* [31:28] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_port_ctrl_ring_u;

/* Define the union csr_sc_acg_cfg0_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    acg_enable_sel    : 8  ; /* [7:0] */
        u32    acg_off_mod       : 1  ; /* [8] */
        u32    acg_off_time_step : 1  ; /* [9] */
        u32    acg_trim          : 2  ; /* [11:10] */
        u32    acg_glitch_test   : 1  ; /* [12] */
        u32    acg_div64_en      : 1  ; /* [13] */
        u32    acg_test_ffs      : 2  ; /* [15:14] */
        u32    acg_enable_mod    : 2  ; /* [17:16] */
        u32    acg_d_rate        : 2  ; /* [19:18] */
        u32    rsv_69            : 12  ; /* [31:20] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_acg_cfg0_u;

/* Define the union csr_sc_acg_cfg1_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    acg_test_cpm        : 8  ; /* [7:0] */
        u32    rsv_71              : 6  ; /* [13:8] */
        u32    acg_cpm_period      : 1  ; /* [14] */
        u32    acg_edge_sel        : 1  ; /* [15] */
        u32    acg_data_mod        : 2  ; /* [17:16] */
        u32    acg_data_limit_e    : 1  ; /* [18] */
        u32    acg_cpm_threshold_r : 6  ; /* [24:19] */
        u32    acg_threshold_f     : 6  ; /* [30:25] */
        u32    acg_pulse_width_sel : 1  ; /* [31] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_acg_cfg1_u;

/* Define the union csr_sc_acg_cfg2_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    acg_svt_sl : 4  ; /* [3:0] */
        u32    acg_svt_ll : 4  ; /* [7:4] */
        u32    acg_lvt_sl : 4  ; /* [11:8] */
        u32    acg_lvt_ll : 4  ; /* [15:12] */
        u32    rsv_73     : 16  ; /* [31:16] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_acg_cfg2_u;

/* Define the union csr_sc_acg_bypass_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    acg_bypass : 1  ; /* [0] */
        u32    rsv_75     : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_acg_bypass_u;

/* Define the union csr_sc_pll_src_int_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    pll0_unlock : 1  ; /* [0] */
        u32    rsv_77      : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_pll_src_int_u;

/* Define the union csr_sc_pll_int_mask_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    pll0_unlock_int_mask : 1  ; /* [0] */
        u32    rsv_79               : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_pll_int_mask_u;

/* Define the union csr_sc_pll0_out_clk_sel_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    pll_out_clk_sel : 1  ; /* [0] */
        u32    rsv_81          : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_pll0_out_clk_sel_u;

/* Define the union csr_sc_tsensor0_int_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    tsensor0_under : 1  ; /* [0] */
        u32    tsensor0_over  : 1  ; /* [1] */
        u32    rsv_83         : 30  ; /* [31:2] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_tsensor0_int_u;

/* Define the union csr_sc_tsensor0_int_mask_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    tsensor0_under_int_mask : 1  ; /* [0] */
        u32    tsensor0_over_int_mask  : 1  ; /* [1] */
        u32    rsv_85                  : 30  ; /* [31:2] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_tsensor0_int_mask_u;

/* Define the union csr_sc_cfg_power_down_l3d_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    cfg_power_down_l3d0 : 6  ; /* [5:0] */
        u32    rsv_90              : 2  ; /* [7:6] */
        u32    cfg_power_down_l3d1 : 6  ; /* [13:8] */
        u32    rsv_91              : 2  ; /* [15:14] */
        u32    cfg_power_down_l3d2 : 6  ; /* [21:16] */
        u32    rsv_92              : 2  ; /* [23:22] */
        u32    cfg_power_down_l3d3 : 6  ; /* [29:24] */
        u32    rsv_93              : 2  ; /* [31:30] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_cfg_power_down_l3d_u;

/* Define the union csr_sc_cpu_stanbywfe_cfg_set_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    cpu_standbywfe_other_die_cpu0  : 1  ; /* [0] */
        u32    cpu_standbywfe_other_die_cpu1  : 1  ; /* [1] */
        u32    cpu_standbywfe_other_die_cpu2  : 1  ; /* [2] */
        u32    cpu_standbywfe_other_die_cpu3  : 1  ; /* [3] */
        u32    cpu_standbywfe_other_die_cpu4  : 1  ; /* [4] */
        u32    cpu_standbywfe_other_die_cpu5  : 1  ; /* [5] */
        u32    cpu_standbywfe_other_die_cpu6  : 1  ; /* [6] */
        u32    cpu_standbywfe_other_die_cpu7  : 1  ; /* [7] */
        u32    cpu_standbywfe_other_die_cpu8  : 1  ; /* [8] */
        u32    cpu_standbywfe_other_die_cpu9  : 1  ; /* [9] */
        u32    cpu_standbywfe_other_die_cpu10 : 1  ; /* [10] */
        u32    cpu_standbywfe_other_die_cpu11 : 1  ; /* [11] */
        u32    cpu_standbywfe_other_die_cpu12 : 1  ; /* [12] */
        u32    cpu_standbywfe_other_die_cpu13 : 1  ; /* [13] */
        u32    cpu_standbywfe_other_die_cpu14 : 1  ; /* [14] */
        u32    cpu_standbywfe_other_die_cpu15 : 1  ; /* [15] */
        u32    cpu_standbywfe_other_die_cpu16 : 1  ; /* [16] */
        u32    cpu_standbywfe_other_die_cpu17 : 1  ; /* [17] */
        u32    cpu_standbywfe_other_die_cpu18 : 1  ; /* [18] */
        u32    cpu_standbywfe_other_die_cpu19 : 1  ; /* [19] */
        u32    cpu_standbywfe_other_die_cpu20 : 1  ; /* [20] */
        u32    cpu_standbywfe_other_die_cpu21 : 1  ; /* [21] */
        u32    cpu_standbywfe_other_die_cpu22 : 1  ; /* [22] */
        u32    cpu_standbywfe_other_die_cpu23 : 1  ; /* [23] */
        u32    cpu_standbywfe_other_die_cpu24 : 1  ; /* [24] */
        u32    cpu_standbywfe_other_die_cpu25 : 1  ; /* [25] */
        u32    cpu_standbywfe_other_die_cpu26 : 1  ; /* [26] */
        u32    cpu_standbywfe_other_die_cpu27 : 1  ; /* [27] */
        u32    cpu_standbywfe_other_die_cpu28 : 1  ; /* [28] */
        u32    cpu_standbywfe_other_die_cpu29 : 1  ; /* [29] */
        u32    cpu_standbywfe_other_die_cpu30 : 1  ; /* [30] */
        u32    cpu_standbywfe_other_die_cpu31 : 1  ; /* [31] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_cpu_stanbywfe_cfg_set_u;

/* Define the union csr_sc_cpu_stanbywfe_cfg_clr_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    cpu_not_standbywfe_other_die_cpu0  : 1  ; /* [0] */
        u32    cpu_not_standbywfe_other_die_cpu1  : 1  ; /* [1] */
        u32    cpu_not_standbywfe_other_die_cpu2  : 1  ; /* [2] */
        u32    cpu_not_standbywfe_other_die_cpu3  : 1  ; /* [3] */
        u32    cpu_not_standbywfe_other_die_cpu4  : 1  ; /* [4] */
        u32    cpu_not_standbywfe_other_die_cpu5  : 1  ; /* [5] */
        u32    cpu_not_standbywfe_other_die_cpu6  : 1  ; /* [6] */
        u32    cpu_not_standbywfe_other_die_cpu7  : 1  ; /* [7] */
        u32    cpu_not_standbywfe_other_die_cpu8  : 1  ; /* [8] */
        u32    cpu_not_standbywfe_other_die_cpu9  : 1  ; /* [9] */
        u32    cpu_not_standbywfe_other_die_cpu10 : 1  ; /* [10] */
        u32    cpu_not_standbywfe_other_die_cpu11 : 1  ; /* [11] */
        u32    cpu_not_standbywfe_other_die_cpu12 : 1  ; /* [12] */
        u32    cpu_not_standbywfe_other_die_cpu13 : 1  ; /* [13] */
        u32    cpu_not_standbywfe_other_die_cpu14 : 1  ; /* [14] */
        u32    cpu_not_standbywfe_other_die_cpu15 : 1  ; /* [15] */
        u32    cpu_not_standbywfe_other_die_cpu16 : 1  ; /* [16] */
        u32    cpu_not_standbywfe_other_die_cpu17 : 1  ; /* [17] */
        u32    cpu_not_standbywfe_other_die_cpu18 : 1  ; /* [18] */
        u32    cpu_not_standbywfe_other_die_cpu19 : 1  ; /* [19] */
        u32    cpu_not_standbywfe_other_die_cpu20 : 1  ; /* [20] */
        u32    cpu_not_standbywfe_other_die_cpu21 : 1  ; /* [21] */
        u32    cpu_not_standbywfe_other_die_cpu22 : 1  ; /* [22] */
        u32    cpu_not_standbywfe_other_die_cpu23 : 1  ; /* [23] */
        u32    cpu_not_standbywfe_other_die_cpu24 : 1  ; /* [24] */
        u32    cpu_not_standbywfe_other_die_cpu25 : 1  ; /* [25] */
        u32    cpu_not_standbywfe_other_die_cpu26 : 1  ; /* [26] */
        u32    cpu_not_standbywfe_other_die_cpu27 : 1  ; /* [27] */
        u32    cpu_not_standbywfe_other_die_cpu28 : 1  ; /* [28] */
        u32    cpu_not_standbywfe_other_die_cpu29 : 1  ; /* [29] */
        u32    cpu_not_standbywfe_other_die_cpu30 : 1  ; /* [30] */
        u32    cpu_not_standbywfe_other_die_cpu31 : 1  ; /* [31] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_cpu_stanbywfe_cfg_clr_u;

/* Define the union csr_sc_cpu_stanbywfe_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    sc_cpu_standwfe : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_cpu_stanbywfe_u;

/* Define the union csr_sc_cpu_stanbywfe_origin_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    sc_cpu_standwfe_origin : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_cpu_stanbywfe_origin_u;

/* Define the union csr_sc_pll_lock_status_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    pll0_lock : 1  ; /* [0] */
        u32    rsv_95    : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_pll_lock_status_u;

/* Define the union csr_sc_l3d_clk_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_st_l3d0 : 1  ; /* [0] */
        u32    icg_st_l3d1 : 1  ; /* [1] */
        u32    icg_st_l3d2 : 1  ; /* [2] */
        u32    icg_st_l3d3 : 1  ; /* [3] */
        u32    rsv_97      : 28  ; /* [31:4] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_l3d_clk_st_u;

/* Define the union csr_sc_hha_clk_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_st_hha0 : 1  ; /* [0] */
        u32    icg_st_hha1 : 1  ; /* [1] */
        u32    rsv_99      : 30  ; /* [31:2] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_hha_clk_st_u;

/* Define the union csr_sc_mn_clk_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_st_mn : 1  ; /* [0] */
        u32    rsv_101   : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_mn_clk_st_u;

/* Define the union csr_sc_l3_mbist_clk_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    icg_st_mbist_l3d0  : 1  ; /* [0] */
        u32    icg_st_mbist_l3d1  : 1  ; /* [1] */
        u32    icg_st_mbist_l3d2  : 1  ; /* [2] */
        u32    icg_st_mbist_l3d3  : 1  ; /* [3] */
        u32    icg_st_mbist_l3t0  : 1  ; /* [4] */
        u32    icg_st_mbist_l3t1  : 1  ; /* [5] */
        u32    icg_st_mbist_l3t2  : 1  ; /* [6] */
        u32    icg_st_mbist_l3t3  : 1  ; /* [7] */
        u32    icg_st_mbist_l3t4  : 1  ; /* [8] */
        u32    icg_st_mbist_l3t5  : 1  ; /* [9] */
        u32    icg_st_mbist_l3dt6 : 1  ; /* [10] */
        u32    icg_st_mbist_l3t7  : 1  ; /* [11] */
        u32    rsv_103            : 20  ; /* [31:12] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_l3_mbist_clk_st_u;

/* Define the union csr_sc_l3d_reset_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    l3d0_srst_st : 1  ; /* [0] */
        u32    l3d1_srst_st : 1  ; /* [1] */
        u32    l3d2_srst_st : 1  ; /* [2] */
        u32    l3d3_srst_st : 1  ; /* [3] */
        u32    rsv_105      : 28  ; /* [31:4] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_l3d_reset_st_u;

/* Define the union csr_sc_hha_reset_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    hha0_srst_st : 1  ; /* [0] */
        u32    hha1_srst_st : 1  ; /* [1] */
        u32    rsv_107      : 30  ; /* [31:2] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_hha_reset_st_u;

/* Define the union csr_sc_mn_reset_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    mn_srst_st : 1  ; /* [0] */
        u32    rsv_109    : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_mn_reset_st_u;

/* Define the union csr_sc_cpm_reset_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    cpm_srst_st : 1  ; /* [0] */
        u32    rsv_111     : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_cpm_reset_st_u;

/* Define the union csr_sc_ffs_reset_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    ffs_srst_st : 1  ; /* [0] */
        u32    rsv_113     : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_ffs_reset_st_u;

/* Define the union csr_sc_l3_mbsit_reset_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    srst_st_mbist_l3d0  : 1  ; /* [0] */
        u32    srst_st_mbist_l3d1  : 1  ; /* [1] */
        u32    srst_st_mbist_l3d2  : 1  ; /* [2] */
        u32    srst_st_mbist_l3d3  : 1  ; /* [3] */
        u32    srst_st_mbist_l3t0  : 1  ; /* [4] */
        u32    srst_st_mbist_l3t1  : 1  ; /* [5] */
        u32    srst_st_mbist_l3t2  : 1  ; /* [6] */
        u32    srst_st_mbist_l3t3  : 1  ; /* [7] */
        u32    srst_st_mbist_l3t4  : 1  ; /* [8] */
        u32    srst_st_mbist_l3t5  : 1  ; /* [9] */
        u32    srst_st_mbist_l3dt6 : 1  ; /* [10] */
        u32    srst_st_mbist_l3t7  : 1  ; /* [11] */
        u32    rsv_115             : 20  ; /* [31:12] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_l3_mbsit_reset_st_u;

/* Define the union csr_sc_tsensor0_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    tsensor0_temp_out   : 10  ; /* [9:0] */
        u32    rsv_118             : 2  ; /* [11:10] */
        u32    tsensor0_temp_ready : 1  ; /* [12] */
        u32    rsv_119             : 19  ; /* [31:13] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_tsensor0_st_u;

/* Define the union csr_sc_tsensor0_temp_sample_average_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    tsensor0_sample : 10  ; /* [9:0] */
        u32    rsv_121         : 21  ; /* [30:10] */
        u32    tsensor0_valid  : 1  ; /* [31] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_tsensor0_temp_sample_average_u;

/* Define the union csr_sc_cpu_stanbywfe_cfg_st_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    cpu_standbywfe_st_other_die_cpu0  : 1  ; /* [0] */
        u32    cpu_standbywfe_st_other_die_cpu1  : 1  ; /* [1] */
        u32    cpu_standbywfe_st_other_die_cpu2  : 1  ; /* [2] */
        u32    cpu_standbywfe_st_other_die_cpu3  : 1  ; /* [3] */
        u32    cpu_standbywfe_st_other_die_cpu4  : 1  ; /* [4] */
        u32    cpu_standbywfe_st_other_die_cpu5  : 1  ; /* [5] */
        u32    cpu_standbywfe_st_other_die_cpu6  : 1  ; /* [6] */
        u32    cpu_standbywfe_st_other_die_cpu7  : 1  ; /* [7] */
        u32    cpu_standbywfe_st_other_die_cpu8  : 1  ; /* [8] */
        u32    cpu_standbywfe_st_other_die_cpu9  : 1  ; /* [9] */
        u32    cpu_standbywfe_st_other_die_cpu10 : 1  ; /* [10] */
        u32    cpu_standbywfe_st_other_die_cpu11 : 1  ; /* [11] */
        u32    cpu_standbywfe_st_other_die_cpu12 : 1  ; /* [12] */
        u32    cpu_standbywfe_st_other_die_cpu13 : 1  ; /* [13] */
        u32    cpu_standbywfe_st_other_die_cpu14 : 1  ; /* [14] */
        u32    cpu_standbywfe_st_other_die_cpu15 : 1  ; /* [15] */
        u32    cpu_standbywfe_st_other_die_cpu16 : 1  ; /* [16] */
        u32    cpu_standbywfe_st_other_die_cpu17 : 1  ; /* [17] */
        u32    cpu_standbywfe_st_other_die_cpu18 : 1  ; /* [18] */
        u32    cpu_standbywfe_st_other_die_cpu19 : 1  ; /* [19] */
        u32    cpu_standbywfe_st_other_die_cpu20 : 1  ; /* [20] */
        u32    cpu_standbywfe_st_other_die_cpu21 : 1  ; /* [21] */
        u32    cpu_standbywfe_st_other_die_cpu22 : 1  ; /* [22] */
        u32    cpu_standbywfe_st_other_die_cpu23 : 1  ; /* [23] */
        u32    cpu_standbywfe_st_other_die_cpu24 : 1  ; /* [24] */
        u32    cpu_standbywfe_st_other_die_cpu25 : 1  ; /* [25] */
        u32    cpu_standbywfe_st_other_die_cpu26 : 1  ; /* [26] */
        u32    cpu_standbywfe_st_other_die_cpu27 : 1  ; /* [27] */
        u32    cpu_standbywfe_st_other_die_cpu28 : 1  ; /* [28] */
        u32    cpu_standbywfe_st_other_die_cpu29 : 1  ; /* [29] */
        u32    cpu_standbywfe_st_other_die_cpu30 : 1  ; /* [30] */
        u32    cpu_standbywfe_st_other_die_cpu31 : 1  ; /* [31] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_cpu_stanbywfe_cfg_st_u;

/* Define the union csr_sc_acg_st0_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    acg_lock          : 1  ; /* [0] */
        u32    acg_glitch_result : 1  ; /* [1] */
        u32    acg_test_out_ffs  : 4  ; /* [5:2] */
        u32    rsv_123           : 26  ; /* [31:6] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_acg_st0_u;

/* Define the union csr_sc_acg_st1_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    acg_cpm_data     : 16  ; /* [15:0] */
        u32    rsv_126          : 4  ; /* [19:16] */
        u32    acg_test_out_cpm : 4  ; /* [23:20] */
        u32    rsv_127          : 8  ; /* [31:24] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_acg_st1_u;

/* Define the union csr_sc_pll_int_status_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    pll0_unlock_int_status : 1  ; /* [0] */
        u32    rsv_129                : 31  ; /* [31:1] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_pll_int_status_u;

/* Define the union csr_sc_tsensor_int_status_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    tsensor_under_int_status : 1  ; /* [0] */
        u32    tsensor_over_int_status  : 1  ; /* [1] */
        u32    rsv_131                  : 30  ; /* [31:2] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_tsensor_int_status_u;

/* Define the union csr_fabric_cfg_version0_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    fabric_cfg_version0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_fabric_cfg_version0_u;

/* Define the union csr_fabric_cfg_magic_word_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    fabric_cfg_magic_word : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_fabric_cfg_magic_word_u;

/* Define the union csr_fabric_cfg_eco_cfg0_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    fabric_cfg_eco_cfg0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_fabric_cfg_eco_cfg0_u;

/* Define the union csr_fabric_cfg_eco_cfg1_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    fabric_cfg_eco_cfg1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_fabric_cfg_eco_cfg1_u;

/* Define the union csr_fabric_cfg_eco_cfg2_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    fabric_cfg_eco_cfg2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_fabric_cfg_eco_cfg2_u;

/* Define the union csr_fabric_cfg_eco_cfg3_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    fabric_cfg_eco_cfg3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_fabric_cfg_eco_cfg3_u;

/* Define the union csr_sc_sysctrl_lock_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    sysctrl_lock : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_sysctrl_lock_u;

/* Define the union csr_sc_sysctrl_unlock_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    sysctrl_unlock : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_sysctrl_unlock_u;

/* Define the union csr_sc_eco_rsv0_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    eco_rsv0 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_eco_rsv0_u;

/* Define the union csr_sc_eco_rsv1_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    eco_rsv1 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_eco_rsv1_u;

/* Define the union csr_sc_eco_rsv2_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    eco_rsv2 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_eco_rsv2_u;

/* Define the union csr_sc_eco_rsv3_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    eco_rsv3 : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_eco_rsv3_u;

/* Define the union csr_sc_eco_rsv4_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    prototype_clk : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_eco_rsv4_u;

/* Define the union csr_sc_eco_rsv5_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    prototype_rst_n : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_sc_eco_rsv5_u;

/* Define the union csr_fpga_ver_u */
typedef union {
    /* Define the struct bits */
    struct {
        u32    fpga_veri_num : 32  ; /* [31:0] */
    } bits;

    /* Define an unsigned member */
    u32    value;
}csr_fpga_ver_u;


// ==============================================================================
/* Define the global struct */
typedef struct {
    volatile csr_sc_pllfctrl0_u                    sc_pllfctrl0                    ; /* 0 */
    volatile csr_sc_pllfctrl1_u                    sc_pllfctrl1                    ; /* 4 */
    volatile csr_sc_pll_clk_bypass0_u              sc_pll_clk_bypass0              ; /* A0 */
    volatile csr_sc_switch_clk_sel_u               sc_switch_clk_sel               ; /* 110 */
    volatile csr_sc_pll_lp_clk_sel_u               sc_pll_lp_clk_sel               ; /* 160 */
    volatile csr_sc_l3d_clk_en_u                   sc_l3d_clk_en                   ; /* 330 */
    volatile csr_sc_l3d_clk_dis_u                  sc_l3d_clk_dis                  ; /* 334 */
    volatile csr_sc_hha_clk_en_u                   sc_hha_clk_en                   ; /* 350 */
    volatile csr_sc_hha_clk_dis_u                  sc_hha_clk_dis                  ; /* 354 */
    volatile csr_sc_mn_clk_en_u                    sc_mn_clk_en                    ; /* 358 */
    volatile csr_sc_mn_clk_dis_u                   sc_mn_clk_dis                   ; /* 35C */
    volatile csr_sc_l3_mbist_clk_en_u              sc_l3_mbist_clk_en              ; /* 680 */
    volatile csr_sc_l3_mbist_clk_dis_u             sc_l3_mbist_clk_dis             ; /* 684 */
    volatile csr_sc_l3d_reset_req_u                sc_l3d_reset_req                ; /* A20 */
    volatile csr_sc_l3d_reset_dreq_u               sc_l3d_reset_dreq               ; /* A24 */
    volatile csr_sc_hha_reset_req_u                sc_hha_reset_req                ; /* A40 */
    volatile csr_sc_hha_reset_dreq_u               sc_hha_reset_dreq               ; /* A44 */
    volatile csr_sc_mn_reset_req_u                 sc_mn_reset_req                 ; /* A48 */
    volatile csr_sc_mn_reset_dreq_u                sc_mn_reset_dreq                ; /* A4C */
    volatile csr_sc_cpm_reset_req_u                sc_cpm_reset_req                ; /* A50 */
    volatile csr_sc_cpm_reset_dreq_u               sc_cpm_reset_dreq               ; /* A54 */
    volatile csr_sc_ffs_reset_req_u                sc_ffs_reset_req                ; /* A58 */
    volatile csr_sc_ffs_reset_dreq_u               sc_ffs_reset_dreq               ; /* A5C */
    volatile csr_sc_hha_mbist_reset_req_u          sc_hha_mbist_reset_req          ; /* D80 */
    volatile csr_sc_hha_mbist_reset_dreq_u         sc_hha_mbist_reset_dreq         ; /* D84 */
    volatile csr_sc_ts_en_u                        sc_ts_en                        ; /* 2010 */
    volatile csr_sc_tsensor0_alarm_u               sc_tsensor0_alarm               ; /* 20C0 */
    volatile csr_sc_tsensor0_sample_num_u          sc_tsensor0_sample_num          ; /* 20C4 */
    volatile csr_sc_tsensor0_ctrl_u                sc_tsensor0_ctrl                ; /* 20D0 */
    volatile csr_sc_tsensor0_vcalib_u              sc_tsensor0_vcalib              ; /* 20D4 */
    volatile csr_sc_poe_smmu_enent_en_u            sc_poe_smmu_enent_en            ; /* 20F0 */
    volatile csr_sc_port_ctrl_ring_u               sc_port_ctrl_ring               ; /* 2100 */
    volatile csr_sc_acg_cfg0_u                     sc_acg_cfg0                     ; /* 3600 */
    volatile csr_sc_acg_cfg1_u                     sc_acg_cfg1                     ; /* 3604 */
    volatile csr_sc_acg_cfg2_u                     sc_acg_cfg2                     ; /* 3608 */
    volatile csr_sc_acg_bypass_u                   sc_acg_bypass                   ; /* 3650 */
    volatile csr_sc_pll_src_int_u                  sc_pll_src_int                  ; /* 4000 */
    volatile csr_sc_pll_int_mask_u                 sc_pll_int_mask                 ; /* 4004 */
    volatile csr_sc_pll0_out_clk_sel_u             sc_pll0_out_clk_sel             ; /* 4008 */
    volatile csr_sc_tsensor0_int_u                 sc_tsensor0_int                 ; /* 4010 */
    volatile csr_sc_tsensor0_int_mask_u            sc_tsensor0_int_mask            ; /* 4014 */
    volatile csr_sc_cfg_power_down_l3d_u           sc_cfg_power_down_l3d           ; /* 4020 */
    volatile csr_sc_cpu_stanbywfe_cfg_set_u        sc_cpu_stanbywfe_cfg_set        ; /* 4800 */
    volatile csr_sc_cpu_stanbywfe_cfg_clr_u        sc_cpu_stanbywfe_cfg_clr        ; /* 4804 */
    volatile csr_sc_cpu_stanbywfe_u                sc_cpu_stanbywfe                ; /* 4810 */
    volatile csr_sc_cpu_stanbywfe_origin_u         sc_cpu_stanbywfe_origin         ; /* 4814 */
    volatile csr_sc_pll_lock_status_u              sc_pll_lock_status              ; /* 5000 */
    volatile csr_sc_l3d_clk_st_u                   sc_l3d_clk_st                   ; /* 5330 */
    volatile csr_sc_hha_clk_st_u                   sc_hha_clk_st                   ; /* 5350 */
    volatile csr_sc_mn_clk_st_u                    sc_mn_clk_st                    ; /* 5358 */
    volatile csr_sc_l3_mbist_clk_st_u              sc_l3_mbist_clk_st              ; /* 5680 */
    volatile csr_sc_l3d_reset_st_u                 sc_l3d_reset_st                 ; /* 5A20 */
    volatile csr_sc_hha_reset_st_u                 sc_hha_reset_st                 ; /* 5A40 */
    volatile csr_sc_mn_reset_st_u                  sc_mn_reset_st                  ; /* 5A48 */
    volatile csr_sc_cpm_reset_st_u                 sc_cpm_reset_st                 ; /* 5A50 */
    volatile csr_sc_ffs_reset_st_u                 sc_ffs_reset_st                 ; /* 5A58 */
    volatile csr_sc_l3_mbsit_reset_st_u            sc_l3_mbsit_reset_st            ; /* 5D80 */
    volatile csr_sc_tsensor0_st_u                  sc_tsensor0_st                  ; /* 60D0 */
    volatile csr_sc_tsensor0_temp_sample_average_u sc_tsensor0_temp_sample_average ; /* 60D4 */
    volatile csr_sc_cpu_stanbywfe_cfg_st_u         sc_cpu_stanbywfe_cfg_st         ; /* 6200 */
    volatile csr_sc_acg_st0_u                      sc_acg_st0                      ; /* 6600 */
    volatile csr_sc_acg_st1_u                      sc_acg_st1                      ; /* 6604 */
    volatile csr_sc_pll_int_status_u               sc_pll_int_status               ; /* 8000 */
    volatile csr_sc_tsensor_int_status_u           sc_tsensor_int_status           ; /* 8010 */
    volatile csr_fabric_cfg_version0_u             fabric_cfg_version0             ; /* E0A0 */
    volatile csr_fabric_cfg_magic_word_u           fabric_cfg_magic_word           ; /* E0A4 */
    volatile csr_fabric_cfg_eco_cfg0_u             fabric_cfg_eco_cfg0             ; /* E0A8 */
    volatile csr_fabric_cfg_eco_cfg1_u             fabric_cfg_eco_cfg1             ; /* E0AC */
    volatile csr_fabric_cfg_eco_cfg2_u             fabric_cfg_eco_cfg2             ; /* E0B0 */
    volatile csr_fabric_cfg_eco_cfg3_u             fabric_cfg_eco_cfg3             ; /* E0B4 */
    volatile csr_sc_sysctrl_lock_u                 sc_sysctrl_lock                 ; /* F100 */
    volatile csr_sc_sysctrl_unlock_u               sc_sysctrl_unlock               ; /* F110 */
    volatile csr_sc_eco_rsv0_u                     sc_eco_rsv0                     ; /* FF00 */
    volatile csr_sc_eco_rsv1_u                     sc_eco_rsv1                     ; /* FF04 */
    volatile csr_sc_eco_rsv2_u                     sc_eco_rsv2                     ; /* FF08 */
    volatile csr_sc_eco_rsv3_u                     sc_eco_rsv3                     ; /* FF0C */
    volatile csr_sc_eco_rsv4_u                     sc_eco_rsv4                     ; /* FF10 */
    volatile csr_sc_eco_rsv5_u                     sc_eco_rsv5                     ; /* FF14 */
    volatile csr_fpga_ver_u                        fpga_ver                        ; /* FFFC */
} S_fabric_top_cfg_REGS_TYPE;

/* Declare the struct pointor of the module fabric_top_cfg */
extern volatile S_fabric_top_cfg_REGS_TYPE *gopfabric_top_cfgAllReg;

/* Declare the functions that set the member value */
int iSetSC_PLLFCTRL0_pll0_refdiv(unsigned int upll0_refdiv);
int iSetSC_PLLFCTRL0_pll0_fbdiv(unsigned int upll0_fbdiv);
int iSetSC_PLLFCTRL0_pll0_postdiv1(unsigned int upll0_postdiv1);
int iSetSC_PLLFCTRL0_pll0_postdiv2(unsigned int upll0_postdiv2);
int iSetSC_PLLFCTRL0_pll0_bypass(unsigned int upll0_bypass);
int iSetSC_PLLFCTRL0_pll0_en(unsigned int upll0_en);
int iSetSC_PLLFCTRL0_pll0_dsmen(unsigned int upll0_dsmen);
int iSetSC_PLLFCTRL0_pll0_dacen(unsigned int upll0_dacen);
int iSetSC_PLLFCTRL0_pll0_fout4phaseen(unsigned int upll0_fout4phaseen);
int iSetSC_PLLFCTRL0_pll0_foutpostdiven(unsigned int upll0_foutpostdiven);
int iSetSC_PLLFCTRL0_pll0_foutvcoen(unsigned int upll0_foutvcoen);
int iSetSC_PLLFCTRL1_pll0_frac(unsigned int upll0_frac);
int iSetSC_PLL_CLK_BYPASS0_pll0_bypass_external_n(unsigned int upll0_bypass_external_n);
int iSetSC_SWITCH_CLK_SEL_switch_div_sel_kernel_ultrasoc(unsigned int uswitch_div_sel_kernel_ultrasoc);
int iSetSC_SWITCH_CLK_SEL_switch_div_sel_gic(unsigned int uswitch_div_sel_gic);
int iSetSC_SWITCH_CLK_SEL_switch_div_sel_poe(unsigned int uswitch_div_sel_poe);
int iSetSC_PLL_LP_CLK_SEL_lp_clk_sel(unsigned int ulp_clk_sel);
int iSetSC_L3D_CLK_EN_icg_en_l3d0(unsigned int uicg_en_l3d0);
int iSetSC_L3D_CLK_EN_icg_en_l3d1(unsigned int uicg_en_l3d1);
int iSetSC_L3D_CLK_EN_icg_en_l3d2(unsigned int uicg_en_l3d2);
int iSetSC_L3D_CLK_EN_icg_en_l3d3(unsigned int uicg_en_l3d3);
int iSetSC_L3D_CLK_DIS_icg_dis_l3d0(unsigned int uicg_dis_l3d0);
int iSetSC_L3D_CLK_DIS_icg_dis_l3d1(unsigned int uicg_dis_l3d1);
int iSetSC_L3D_CLK_DIS_icg_dis_l3d2(unsigned int uicg_dis_l3d2);
int iSetSC_L3D_CLK_DIS_icg_dis_l3d3(unsigned int uicg_dis_l3d3);
int iSetSC_HHA_CLK_EN_icg_en_hha0(unsigned int uicg_en_hha0);
int iSetSC_HHA_CLK_EN_icg_en_hha1(unsigned int uicg_en_hha1);
int iSetSC_HHA_CLK_DIS_icg_dis_hha0(unsigned int uicg_dis_hha0);
int iSetSC_HHA_CLK_DIS_icg_dis_hha1(unsigned int uicg_dis_hha1);
int iSetSC_MN_CLK_EN_icg_en_mn(unsigned int uicg_en_mn);
int iSetSC_MN_CLK_DIS_icg_dis_mn(unsigned int uicg_dis_mn);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3d0(unsigned int uicg_en_mbist_l3d0);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3d1(unsigned int uicg_en_mbist_l3d1);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3d2(unsigned int uicg_en_mbist_l3d2);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3d3(unsigned int uicg_en_mbist_l3d3);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3t0(unsigned int uicg_en_mbist_l3t0);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3t1(unsigned int uicg_en_mbist_l3t1);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3t2(unsigned int uicg_en_mbist_l3t2);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3t3(unsigned int uicg_en_mbist_l3t3);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3t4(unsigned int uicg_en_mbist_l3t4);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3t5(unsigned int uicg_en_mbist_l3t5);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3t6(unsigned int uicg_en_mbist_l3t6);
int iSetSC_L3_MBIST_CLK_EN_icg_en_mbist_l3t7(unsigned int uicg_en_mbist_l3t7);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3d0(unsigned int uicg_dis_mbist_l3d0);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3d1(unsigned int uicg_dis_mbist_l3d1);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3d2(unsigned int uicg_dis_mbist_l3d2);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3d3(unsigned int uicg_dis_mbist_l3d3);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3t0(unsigned int uicg_dis_mbist_l3t0);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3t1(unsigned int uicg_dis_mbist_l3t1);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3t2(unsigned int uicg_dis_mbist_l3t2);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3t3(unsigned int uicg_dis_mbist_l3t3);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3t4(unsigned int uicg_dis_mbist_l3t4);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3t5(unsigned int uicg_dis_mbist_l3t5);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3t6(unsigned int uicg_dis_mbist_l3t6);
int iSetSC_L3_MBIST_CLK_DIS_icg_dis_mbist_l3t7(unsigned int uicg_dis_mbist_l3t7);
int iSetSC_L3D_RESET_REQ_srst_req_l3d0(unsigned int usrst_req_l3d0);
int iSetSC_L3D_RESET_REQ_srst_req_l3d1(unsigned int usrst_req_l3d1);
int iSetSC_L3D_RESET_REQ_srst_req_l3d2(unsigned int usrst_req_l3d2);
int iSetSC_L3D_RESET_REQ_srst_req_l3d3(unsigned int usrst_req_l3d3);
int iSetSC_L3D_RESET_DREQ_srst_dreq_l3d0(unsigned int usrst_dreq_l3d0);
int iSetSC_L3D_RESET_DREQ_srst_dreq_l3d1(unsigned int usrst_dreq_l3d1);
int iSetSC_L3D_RESET_DREQ_srst_dreq_l3d2(unsigned int usrst_dreq_l3d2);
int iSetSC_L3D_RESET_DREQ_srst_dreq_l3d3(unsigned int usrst_dreq_l3d3);
int iSetSC_HHA_RESET_REQ_srst_req_hha0(unsigned int usrst_req_hha0);
int iSetSC_HHA_RESET_REQ_srst_req_hha1(unsigned int usrst_req_hha1);
int iSetSC_HHA_RESET_DREQ_srst_dreq_hha0(unsigned int usrst_dreq_hha0);
int iSetSC_HHA_RESET_DREQ_srst_dreq_hha1(unsigned int usrst_dreq_hha1);
int iSetSC_MN_RESET_REQ_srst_req_mn(unsigned int usrst_req_mn);
int iSetSC_MN_RESET_DREQ_srst_dreq_mn(unsigned int usrst_dreq_mn);
int iSetSC_CPM_RESET_REQ_srst_req_cpm(unsigned int usrst_req_cpm);
int iSetSC_CPM_RESET_DREQ_srst_dreq_cpm(unsigned int usrst_dreq_cpm);
int iSetSC_FFS_RESET_REQ_srst_req_ffs(unsigned int usrst_req_ffs);
int iSetSC_FFS_RESET_DREQ_srst_dreq_ffs(unsigned int usrst_dreq_ffs);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3d0(unsigned int usrst_req_mbist_l3d0);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3d1(unsigned int usrst_req_mbist_l3d1);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3d2(unsigned int usrst_req_mbist_l3d2);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3d3(unsigned int usrst_req_mbist_l3d3);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3t0(unsigned int usrst_req_mbist_l3t0);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3t1(unsigned int usrst_req_mbist_l3t1);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3t2(unsigned int usrst_req_mbist_l3t2);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3t3(unsigned int usrst_req_mbist_l3t3);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3t4(unsigned int usrst_req_mbist_l3t4);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3t5(unsigned int usrst_req_mbist_l3t5);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3t6(unsigned int usrst_req_mbist_l3t6);
int iSetSC_HHA_MBIST_RESET_REQ_srst_req_mbist_l3t7(unsigned int usrst_req_mbist_l3t7);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3d0(unsigned int usrst_dreq_mbist_l3d0);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3d1(unsigned int usrst_dreq_mbist_l3d1);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3d2(unsigned int usrst_dreq_mbist_l3d2);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3d3(unsigned int usrst_dreq_mbist_l3d3);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3t0(unsigned int usrst_dreq_mbist_l3t0);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3t1(unsigned int usrst_dreq_mbist_l3t1);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3t2(unsigned int usrst_dreq_mbist_l3t2);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3t3(unsigned int usrst_dreq_mbist_l3t3);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3t4(unsigned int usrst_dreq_mbist_l3t4);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3t5(unsigned int usrst_dreq_mbist_l3t5);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3t6(unsigned int usrst_dreq_mbist_l3t6);
int iSetSC_HHA_MBIST_RESET_DREQ_srst_dreq_mbist_l3t7(unsigned int usrst_dreq_mbist_l3t7);
int iSetSC_TS_EN_sc_ts_en(unsigned int usc_ts_en);
int iSetSC_TSENSOR0_ALARM_tsensor0_low(unsigned int utsensor0_low);
int iSetSC_TSENSOR0_ALARM_tsensor0_high(unsigned int utsensor0_high);
int iSetSC_TSENSOR0_SAMPLE_NUM_tsensor0_sample_shift_num(unsigned int utsensor0_sample_shift_num);
int iSetSC_TSENSOR0_CTRL_tsensor0_temp_en(unsigned int utsensor0_temp_en);
int iSetSC_TSENSOR0_CTRL_tsensor0_temp_calib(unsigned int utsensor0_temp_calib);
int iSetSC_TSENSOR0_CTRL_tsensor0_temp_ct_sel(unsigned int utsensor0_temp_ct_sel);
int iSetSC_TSENSOR0_VCALIB_tsensor0_temp_ready_sel(unsigned int utsensor0_temp_ready_sel);
int iSetSC_TSENSOR0_VCALIB_tsensor0_temp_cfg(unsigned int utsensor0_temp_cfg);
int iSetSC_POE_SMMU_ENENT_EN_sc_poe_smmu_event_en(unsigned int usc_poe_smmu_event_en);
int iSetSC_PORT_CTRL_RING_close_port_gic(unsigned int uclose_port_gic);
int iSetSC_PORT_CTRL_RING_close_port_l3dright3(unsigned int uclose_port_l3dright3);
int iSetSC_PORT_CTRL_RING_close_port_l3dright2(unsigned int uclose_port_l3dright2);
int iSetSC_PORT_CTRL_RING_close_port_l3dright1(unsigned int uclose_port_l3dright1);
int iSetSC_PORT_CTRL_RING_close_port_l3dright0(unsigned int uclose_port_l3dright0);
int iSetSC_PORT_CTRL_RING_close_port_l3dleft3(unsigned int uclose_port_l3dleft3);
int iSetSC_PORT_CTRL_RING_close_port_l3dleft2(unsigned int uclose_port_l3dleft2);
int iSetSC_PORT_CTRL_RING_close_port_l3dleft1(unsigned int uclose_port_l3dleft1);
int iSetSC_PORT_CTRL_RING_close_port_l3dleft0(unsigned int uclose_port_l3dleft0);
int iSetSC_PORT_CTRL_RING_close_port_l3t7(unsigned int uclose_port_l3t7);
int iSetSC_PORT_CTRL_RING_close_port_l3t6(unsigned int uclose_port_l3t6);
int iSetSC_PORT_CTRL_RING_close_port_l3t5(unsigned int uclose_port_l3t5);
int iSetSC_PORT_CTRL_RING_close_port_l3t4(unsigned int uclose_port_l3t4);
int iSetSC_PORT_CTRL_RING_close_port_l3t3(unsigned int uclose_port_l3t3);
int iSetSC_PORT_CTRL_RING_close_port_l3t2(unsigned int uclose_port_l3t2);
int iSetSC_PORT_CTRL_RING_close_port_l3t1(unsigned int uclose_port_l3t1);
int iSetSC_PORT_CTRL_RING_close_port_l3t0(unsigned int uclose_port_l3t0);
int iSetSC_PORT_CTRL_RING_close_port_hha3(unsigned int uclose_port_hha3);
int iSetSC_PORT_CTRL_RING_close_port_hha2(unsigned int uclose_port_hha2);
int iSetSC_PORT_CTRL_RING_close_port_hha1(unsigned int uclose_port_hha1);
int iSetSC_PORT_CTRL_RING_close_port_hha0(unsigned int uclose_port_hha0);
int iSetSC_PORT_CTRL_RING_close_port_mn(unsigned int uclose_port_mn);
int iSetSC_PORT_CTRL_RING_close_port_peri(unsigned int uclose_port_peri);
int iSetSC_PORT_CTRL_RING_close_port_poe(unsigned int uclose_port_poe);
int iSetSC_PORT_CTRL_RING_close_port_sllc3(unsigned int uclose_port_sllc3);
int iSetSC_PORT_CTRL_RING_close_port_sllc2(unsigned int uclose_port_sllc2);
int iSetSC_PORT_CTRL_RING_close_port_sllc1(unsigned int uclose_port_sllc1);
int iSetSC_PORT_CTRL_RING_close_port_sllc0(unsigned int uclose_port_sllc0);
int iSetSC_ACG_CFG0_acg_enable_sel(unsigned int uacg_enable_sel);
int iSetSC_ACG_CFG0_acg_off_mod(unsigned int uacg_off_mod);
int iSetSC_ACG_CFG0_acg_off_time_step(unsigned int uacg_off_time_step);
int iSetSC_ACG_CFG0_acg_trim(unsigned int uacg_trim);
int iSetSC_ACG_CFG0_acg_glitch_test(unsigned int uacg_glitch_test);
int iSetSC_ACG_CFG0_acg_div64_en(unsigned int uacg_div64_en);
int iSetSC_ACG_CFG0_acg_test_ffs(unsigned int uacg_test_ffs);
int iSetSC_ACG_CFG0_acg_enable_mod(unsigned int uacg_enable_mod);
int iSetSC_ACG_CFG0_acg_d_rate(unsigned int uacg_d_rate);
int iSetSC_ACG_CFG1_acg_test_cpm(unsigned int uacg_test_cpm);
int iSetSC_ACG_CFG1_acg_cpm_period(unsigned int uacg_cpm_period);
int iSetSC_ACG_CFG1_acg_edge_sel(unsigned int uacg_edge_sel);
int iSetSC_ACG_CFG1_acg_data_mod(unsigned int uacg_data_mod);
int iSetSC_ACG_CFG1_acg_data_limit_e(unsigned int uacg_data_limit_e);
int iSetSC_ACG_CFG1_acg_cpm_threshold_r(unsigned int uacg_cpm_threshold_r);
int iSetSC_ACG_CFG1_acg_threshold_f(unsigned int uacg_threshold_f);
int iSetSC_ACG_CFG1_acg_pulse_width_sel(unsigned int uacg_pulse_width_sel);
int iSetSC_ACG_CFG2_acg_svt_sl(unsigned int uacg_svt_sl);
int iSetSC_ACG_CFG2_acg_svt_ll(unsigned int uacg_svt_ll);
int iSetSC_ACG_CFG2_acg_lvt_sl(unsigned int uacg_lvt_sl);
int iSetSC_ACG_CFG2_acg_lvt_ll(unsigned int uacg_lvt_ll);
int iSetSC_ACG_BYPASS_acg_bypass(unsigned int uacg_bypass);
int iSetSC_PLL_SRC_INT_pll0_unlock(unsigned int upll0_unlock);
int iSetSC_PLL_INT_MASK_pll0_unlock_int_mask(unsigned int upll0_unlock_int_mask);
int iSetSC_PLL0_OUT_CLK_SEL_pll_out_clk_sel(unsigned int upll_out_clk_sel);
int iSetSC_TSENSOR0_INT_tsensor0_under(unsigned int utsensor0_under);
int iSetSC_TSENSOR0_INT_tsensor0_over(unsigned int utsensor0_over);
int iSetSC_TSENSOR0_INT_MASK_tsensor0_under_int_mask(unsigned int utsensor0_under_int_mask);
int iSetSC_TSENSOR0_INT_MASK_tsensor0_over_int_mask(unsigned int utsensor0_over_int_mask);
int iSetSC_CFG_POWER_DOWN_L3D_cfg_power_down_l3d0(unsigned int ucfg_power_down_l3d0);
int iSetSC_CFG_POWER_DOWN_L3D_cfg_power_down_l3d1(unsigned int ucfg_power_down_l3d1);
int iSetSC_CFG_POWER_DOWN_L3D_cfg_power_down_l3d2(unsigned int ucfg_power_down_l3d2);
int iSetSC_CFG_POWER_DOWN_L3D_cfg_power_down_l3d3(unsigned int ucfg_power_down_l3d3);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu0(unsigned int ucpu_standbywfe_other_die_cpu0);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu1(unsigned int ucpu_standbywfe_other_die_cpu1);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu2(unsigned int ucpu_standbywfe_other_die_cpu2);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu3(unsigned int ucpu_standbywfe_other_die_cpu3);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu4(unsigned int ucpu_standbywfe_other_die_cpu4);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu5(unsigned int ucpu_standbywfe_other_die_cpu5);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu6(unsigned int ucpu_standbywfe_other_die_cpu6);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu7(unsigned int ucpu_standbywfe_other_die_cpu7);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu8(unsigned int ucpu_standbywfe_other_die_cpu8);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu9(unsigned int ucpu_standbywfe_other_die_cpu9);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu10(unsigned int ucpu_standbywfe_other_die_cpu10);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu11(unsigned int ucpu_standbywfe_other_die_cpu11);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu12(unsigned int ucpu_standbywfe_other_die_cpu12);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu13(unsigned int ucpu_standbywfe_other_die_cpu13);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu14(unsigned int ucpu_standbywfe_other_die_cpu14);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu15(unsigned int ucpu_standbywfe_other_die_cpu15);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu16(unsigned int ucpu_standbywfe_other_die_cpu16);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu17(unsigned int ucpu_standbywfe_other_die_cpu17);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu18(unsigned int ucpu_standbywfe_other_die_cpu18);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu19(unsigned int ucpu_standbywfe_other_die_cpu19);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu20(unsigned int ucpu_standbywfe_other_die_cpu20);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu21(unsigned int ucpu_standbywfe_other_die_cpu21);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu22(unsigned int ucpu_standbywfe_other_die_cpu22);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu23(unsigned int ucpu_standbywfe_other_die_cpu23);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu24(unsigned int ucpu_standbywfe_other_die_cpu24);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu25(unsigned int ucpu_standbywfe_other_die_cpu25);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu26(unsigned int ucpu_standbywfe_other_die_cpu26);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu27(unsigned int ucpu_standbywfe_other_die_cpu27);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu28(unsigned int ucpu_standbywfe_other_die_cpu28);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu29(unsigned int ucpu_standbywfe_other_die_cpu29);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu30(unsigned int ucpu_standbywfe_other_die_cpu30);
int iSetSC_CPU_STANBYWFE_CFG_SET_cpu_standbywfe_other_die_cpu31(unsigned int ucpu_standbywfe_other_die_cpu31);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu0(unsigned int ucpu_not_standbywfe_other_die_cpu0);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu1(unsigned int ucpu_not_standbywfe_other_die_cpu1);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu2(unsigned int ucpu_not_standbywfe_other_die_cpu2);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu3(unsigned int ucpu_not_standbywfe_other_die_cpu3);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu4(unsigned int ucpu_not_standbywfe_other_die_cpu4);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu5(unsigned int ucpu_not_standbywfe_other_die_cpu5);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu6(unsigned int ucpu_not_standbywfe_other_die_cpu6);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu7(unsigned int ucpu_not_standbywfe_other_die_cpu7);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu8(unsigned int ucpu_not_standbywfe_other_die_cpu8);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu9(unsigned int ucpu_not_standbywfe_other_die_cpu9);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu10(unsigned int ucpu_not_standbywfe_other_die_cpu10);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu11(unsigned int ucpu_not_standbywfe_other_die_cpu11);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu12(unsigned int ucpu_not_standbywfe_other_die_cpu12);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu13(unsigned int ucpu_not_standbywfe_other_die_cpu13);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu14(unsigned int ucpu_not_standbywfe_other_die_cpu14);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu15(unsigned int ucpu_not_standbywfe_other_die_cpu15);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu16(unsigned int ucpu_not_standbywfe_other_die_cpu16);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu17(unsigned int ucpu_not_standbywfe_other_die_cpu17);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu18(unsigned int ucpu_not_standbywfe_other_die_cpu18);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu19(unsigned int ucpu_not_standbywfe_other_die_cpu19);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu20(unsigned int ucpu_not_standbywfe_other_die_cpu20);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu21(unsigned int ucpu_not_standbywfe_other_die_cpu21);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu22(unsigned int ucpu_not_standbywfe_other_die_cpu22);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu23(unsigned int ucpu_not_standbywfe_other_die_cpu23);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu24(unsigned int ucpu_not_standbywfe_other_die_cpu24);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu25(unsigned int ucpu_not_standbywfe_other_die_cpu25);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu26(unsigned int ucpu_not_standbywfe_other_die_cpu26);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu27(unsigned int ucpu_not_standbywfe_other_die_cpu27);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu28(unsigned int ucpu_not_standbywfe_other_die_cpu28);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu29(unsigned int ucpu_not_standbywfe_other_die_cpu29);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu30(unsigned int ucpu_not_standbywfe_other_die_cpu30);
int iSetSC_CPU_STANBYWFE_CFG_CLR_cpu_not_standbywfe_other_die_cpu31(unsigned int ucpu_not_standbywfe_other_die_cpu31);
int iSetSC_CPU_STANBYWFE_sc_cpu_standwfe(unsigned int usc_cpu_standwfe);
int iSetSC_CPU_STANBYWFE_ORIGIN_sc_cpu_standwfe_origin(unsigned int usc_cpu_standwfe_origin);
int iSetSC_PLL_LOCK_STATUS_pll0_lock(unsigned int upll0_lock);
int iSetSC_L3D_CLK_ST_icg_st_l3d0(unsigned int uicg_st_l3d0);
int iSetSC_L3D_CLK_ST_icg_st_l3d1(unsigned int uicg_st_l3d1);
int iSetSC_L3D_CLK_ST_icg_st_l3d2(unsigned int uicg_st_l3d2);
int iSetSC_L3D_CLK_ST_icg_st_l3d3(unsigned int uicg_st_l3d3);
int iSetSC_HHA_CLK_ST_icg_st_hha0(unsigned int uicg_st_hha0);
int iSetSC_HHA_CLK_ST_icg_st_hha1(unsigned int uicg_st_hha1);
int iSetSC_MN_CLK_ST_icg_st_mn(unsigned int uicg_st_mn);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3d0(unsigned int uicg_st_mbist_l3d0);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3d1(unsigned int uicg_st_mbist_l3d1);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3d2(unsigned int uicg_st_mbist_l3d2);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3d3(unsigned int uicg_st_mbist_l3d3);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3t0(unsigned int uicg_st_mbist_l3t0);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3t1(unsigned int uicg_st_mbist_l3t1);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3t2(unsigned int uicg_st_mbist_l3t2);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3t3(unsigned int uicg_st_mbist_l3t3);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3t4(unsigned int uicg_st_mbist_l3t4);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3t5(unsigned int uicg_st_mbist_l3t5);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3dt6(unsigned int uicg_st_mbist_l3dt6);
int iSetSC_L3_MBIST_CLK_ST_icg_st_mbist_l3t7(unsigned int uicg_st_mbist_l3t7);
int iSetSC_L3D_RESET_ST_l3d0_srst_st(unsigned int ul3d0_srst_st);
int iSetSC_L3D_RESET_ST_l3d1_srst_st(unsigned int ul3d1_srst_st);
int iSetSC_L3D_RESET_ST_l3d2_srst_st(unsigned int ul3d2_srst_st);
int iSetSC_L3D_RESET_ST_l3d3_srst_st(unsigned int ul3d3_srst_st);
int iSetSC_HHA_RESET_ST_hha0_srst_st(unsigned int uhha0_srst_st);
int iSetSC_HHA_RESET_ST_hha1_srst_st(unsigned int uhha1_srst_st);
int iSetSC_MN_RESET_ST_mn_srst_st(unsigned int umn_srst_st);
int iSetSC_CPM_RESET_ST_cpm_srst_st(unsigned int ucpm_srst_st);
int iSetSC_FFS_RESET_ST_ffs_srst_st(unsigned int uffs_srst_st);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3d0(unsigned int usrst_st_mbist_l3d0);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3d1(unsigned int usrst_st_mbist_l3d1);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3d2(unsigned int usrst_st_mbist_l3d2);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3d3(unsigned int usrst_st_mbist_l3d3);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3t0(unsigned int usrst_st_mbist_l3t0);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3t1(unsigned int usrst_st_mbist_l3t1);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3t2(unsigned int usrst_st_mbist_l3t2);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3t3(unsigned int usrst_st_mbist_l3t3);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3t4(unsigned int usrst_st_mbist_l3t4);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3t5(unsigned int usrst_st_mbist_l3t5);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3dt6(unsigned int usrst_st_mbist_l3dt6);
int iSetSC_L3_MBSIT_RESET_ST_srst_st_mbist_l3t7(unsigned int usrst_st_mbist_l3t7);
int iSetSC_TSENSOR0_ST_tsensor0_temp_out(unsigned int utsensor0_temp_out);
int iSetSC_TSENSOR0_ST_tsensor0_temp_ready(unsigned int utsensor0_temp_ready);
int iSetSC_TSENSOR0_TEMP_SAMPLE_AVERAGE_tsensor0_sample(unsigned int utsensor0_sample);
int iSetSC_TSENSOR0_TEMP_SAMPLE_AVERAGE_tsensor0_valid(unsigned int utsensor0_valid);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu0(unsigned int ucpu_standbywfe_st_other_die_cpu0);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu1(unsigned int ucpu_standbywfe_st_other_die_cpu1);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu2(unsigned int ucpu_standbywfe_st_other_die_cpu2);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu3(unsigned int ucpu_standbywfe_st_other_die_cpu3);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu4(unsigned int ucpu_standbywfe_st_other_die_cpu4);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu5(unsigned int ucpu_standbywfe_st_other_die_cpu5);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu6(unsigned int ucpu_standbywfe_st_other_die_cpu6);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu7(unsigned int ucpu_standbywfe_st_other_die_cpu7);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu8(unsigned int ucpu_standbywfe_st_other_die_cpu8);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu9(unsigned int ucpu_standbywfe_st_other_die_cpu9);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu10(unsigned int ucpu_standbywfe_st_other_die_cpu10);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu11(unsigned int ucpu_standbywfe_st_other_die_cpu11);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu12(unsigned int ucpu_standbywfe_st_other_die_cpu12);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu13(unsigned int ucpu_standbywfe_st_other_die_cpu13);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu14(unsigned int ucpu_standbywfe_st_other_die_cpu14);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu15(unsigned int ucpu_standbywfe_st_other_die_cpu15);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu16(unsigned int ucpu_standbywfe_st_other_die_cpu16);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu17(unsigned int ucpu_standbywfe_st_other_die_cpu17);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu18(unsigned int ucpu_standbywfe_st_other_die_cpu18);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu19(unsigned int ucpu_standbywfe_st_other_die_cpu19);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu20(unsigned int ucpu_standbywfe_st_other_die_cpu20);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu21(unsigned int ucpu_standbywfe_st_other_die_cpu21);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu22(unsigned int ucpu_standbywfe_st_other_die_cpu22);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu23(unsigned int ucpu_standbywfe_st_other_die_cpu23);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu24(unsigned int ucpu_standbywfe_st_other_die_cpu24);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu25(unsigned int ucpu_standbywfe_st_other_die_cpu25);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu26(unsigned int ucpu_standbywfe_st_other_die_cpu26);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu27(unsigned int ucpu_standbywfe_st_other_die_cpu27);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu28(unsigned int ucpu_standbywfe_st_other_die_cpu28);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu29(unsigned int ucpu_standbywfe_st_other_die_cpu29);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu30(unsigned int ucpu_standbywfe_st_other_die_cpu30);
int iSetSC_CPU_STANBYWFE_CFG_ST_cpu_standbywfe_st_other_die_cpu31(unsigned int ucpu_standbywfe_st_other_die_cpu31);
int iSetSC_ACG_ST0_acg_lock(unsigned int uacg_lock);
int iSetSC_ACG_ST0_acg_glitch_result(unsigned int uacg_glitch_result);
int iSetSC_ACG_ST0_acg_test_out_ffs(unsigned int uacg_test_out_ffs);
int iSetSC_ACG_ST1_acg_cpm_data(unsigned int uacg_cpm_data);
int iSetSC_ACG_ST1_acg_test_out_cpm(unsigned int uacg_test_out_cpm);
int iSetSC_PLL_INT_STATUS_pll0_unlock_int_status(unsigned int upll0_unlock_int_status);
int iSetSC_TSENSOR_INT_STATUS_tsensor_under_int_status(unsigned int utsensor_under_int_status);
int iSetSC_TSENSOR_INT_STATUS_tsensor_over_int_status(unsigned int utsensor_over_int_status);
int iSetFABRIC_CFG_VERSION0_fabric_cfg_version0(unsigned int ufabric_cfg_version0);
int iSetFABRIC_CFG_MAGIC_WORD_fabric_cfg_magic_word(unsigned int ufabric_cfg_magic_word);
int iSetFABRIC_CFG_ECO_CFG0_fabric_cfg_eco_cfg0(unsigned int ufabric_cfg_eco_cfg0);
int iSetFABRIC_CFG_ECO_CFG1_fabric_cfg_eco_cfg1(unsigned int ufabric_cfg_eco_cfg1);
int iSetFABRIC_CFG_ECO_CFG2_fabric_cfg_eco_cfg2(unsigned int ufabric_cfg_eco_cfg2);
int iSetFABRIC_CFG_ECO_CFG3_fabric_cfg_eco_cfg3(unsigned int ufabric_cfg_eco_cfg3);
int iSetSC_SYSCTRL_LOCK_sysctrl_lock(unsigned int usysctrl_lock);
int iSetSC_SYSCTRL_UNLOCK_sysctrl_unlock(unsigned int usysctrl_unlock);
int iSetSC_ECO_RSV0_eco_rsv0(unsigned int ueco_rsv0);
int iSetSC_ECO_RSV1_eco_rsv1(unsigned int ueco_rsv1);
int iSetSC_ECO_RSV2_eco_rsv2(unsigned int ueco_rsv2);
int iSetSC_ECO_RSV3_eco_rsv3(unsigned int ueco_rsv3);
int iSetSC_ECO_RSV4_prototype_clk(unsigned int uprototype_clk);
int iSetSC_ECO_RSV5_prototype_rst_n(unsigned int uprototype_rst_n);
int iSetFPGA_VER_fpga_veri_num(unsigned int ufpga_veri_num);

#endif // __HI1823E_C_UNION_DEFINE_H__